The present invention relates to a method for producing a semiconductor device and, more particularly, to a method for smoothing an insulating layer.
Conventionally, in integrated circuits or the like, a plurality of insulating layers and conductive layers are deposited to form a multi-interconnection layer in order to increase the packaging density of the elements.
For example, formation of the multi-interconnection layer on a semiconductor substrate on which semiconductor elements are formed can be accomplished in the following manner. As shown in FIG. 1, a first insulating film 2 of silicon oxide or the like is deposited on a substrate 1 in order to insulate the substrate 1 and protect its surface. A contact hole is formed by photolithography at a portion of the first insulating layer 2 which is required for connection between the substrate 1 and a conductive layer to be formed on the first insulating film 2. A metal layer of conductive metal such as aluminum is deposited on the first insulating film 2 and the exposed part of the substrate 1 through the contact hole. This metal film is patterned by photolithography to form a first conductive layer 3. A second insulating film 4 of silicon oxide or the like is deposited on the first conductive film 3 by vapor growth method, high frequency sputtering or the like. A contact hole is then formed in the second insulating film 4 by photolithography, and a second conductive layer 5 which has a predetermined pattern is formed thereafter.
In such a method for forming a multi-interconnection layer, level differences caused by formation of the first conductive layer 3 and the contact hole formed in the second insulating film 4 tend to result in disconnection of the second conductive layer 5 at the sides of the stepped portion and in formation of pinholes and cracks in the second insulating film 4 where the first conductive layer 3 and the second conductive layer 5 meet. Further, the first and second conductive layers tend to short-circuit.
Further, when the pattern gap between the conductive layers 3 and 5 is made narrow or when the diameter of the contact hole in the second insulating film 4 between the conductive layers 3 and 5 is made less than 3 .mu.m, abrupt level differences are formed at contact holes of the first conductive layer 3 and the second insulating film 4. In this way, when the pattern of the conductive layers is elaborate and the level differences are abrupt, the formed insulating film 4 becomes thin at the sides where the level differences are present as shown in FIG. 2, even if a reduced pressure vapor growth method or plasma vapor growth method utilizing glow discharge is used, which is a method for forming an insulating film having excellent coating characteristics. As a result, the voltage resistance between the conductive layers 3 and 5 is degraded and, in the worst case, the conductive layers 3 and 5 are short-circuited. When aluminum or the like is deposited on the second insulating film 4 by sputtering or the electron beam deposition method to form the second conductive layer; however, aluminum is not substantially deposited where level differences are present. Therefore, cracks or disconnections may form in the conductive layer 5 during annealing at a temperature of 450 to 550.degree. C. performed to reduce connection resistance between the conductive layers 3 and 5. The conductive layer 5 may become disconnected due to the electro-migration effect. Due to these problems, an elaborate multi-interconnection layer cannot be achieved, the yield of the product decreases, and the occurance of troubles in service adversely increases.
In order to prevent disconnections of the conductive layers, a method is known in which the insulating film surface is smoothed before the second conductive layer is formed. For example, a glass layer made of phosphorus-doped SiO.sub.2 is used as an insulating film, and annealing is performed at a temperature of not less than 1,000.degree. C. to make the glass layer surface smooth from plastic flow. This method is the so-called glass flow method. However, according to the glass flow method, the acommpanying high-temperature annealing rules out low-melting-point metals such as aluminum for use as the first conductive layer. Further, impurities such as phoshorus, arsenic, and boron which are implanted into the semiconductor substrate become redistributed by the high temperature annealing, and the high packaging density and high speed of the semiconductor device are adversely affected.
Another method for smoothing the insulating film surface before forming the second conductive layer is known in which an SiO.sub.2 film is formed on the first conductive layer of a predetermined pattern by the vapor growth method and then an organic substance such as organosilane is coated thereon, or the organic substance is coated on the first conductive layer and then the SiO.sub.2 film is formed by the vapor growth method. However, according to this method, when an organic substance such as organosilane is calcined, the glass film becomes porous so that hygroscopicity becomes great. Further, since the organic substance remains, the insulation of the SiO.sub.2 film is degraded. Since the organic substance is calcined at a temperature range of 450.degree. to 500.degree. C., cracks may be formed in the SiO.sub.2 film and short circuiting between the conductive layers may occur. Further, when aluminum is used as a conductive layer, the hygroscopicity of the SiO.sub.2 film is great as described above, and the aluminum layer may corrode and be disconnected due to the water content in the SiO.sub.2 film.
For manufacturing dielectric isolation integrated circuit, grooves are formed on the surface of the semiconductor substrate to isolate a plurality of pocket regions. A dielectric material is filled in the grooves by means of selective oxidation. This method also has a drawback in that large protrusions are formed corresponding to the groove pattern, the protrusions assuming shapes such as birds' beaks or birds' heads. Instead of the selective oxidation method having the above-mentioned drawback, it is contemplated that an insulating material may be deposited within the grooves. However, since no effective method for forming a smooth insulating film on an uneven surface is proposed, great restrictions are imposed on forming a dielectric isolation in the transverse direction of the integrated circuit.